Walkthrough5: Simulation

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This page assumes that you have built and uploaded your firmware according to the first steps prescription described and also created your own algorithm to add 5 to the buffers:

It is also advised that you have experience of algorithm modification and the building and testing of firmware:

We will specifically simulate the HLS algo which we developed in Walkthrough4: High Level Synthesis Example. However, any EMP-payload can be simulated using this method if the IP-core specific steps are skipped.

Pre-requisites

As described in Firmware: Build and simulation instructions, the package ModelSim is required to simulate the performance of FPGAs and in particular the behaviour of algorithms developed within the EMP framework. The correct version of ModelSim needs to be matched to the version of vivado that is being used. In the following vivado is only being used to create the simulation library which will then be run in ModelSim via the command-line to obtain simulated outputs of the data buffers. However, the simulation can be equally run within the GUI of ModelSim GUI which gives the option of greater interrogation and diagnostics. IPBB (more info) will be used to create the project.

In addition you should already have your algo repo created as in Walkthrough1: creating your own repository from scratch (and the Prerequisites).

Add IP-core for HLS Simulation

Change to your “top” work-space directory (i.e. has src and proj underneath it) and create the directory for the IP-core of your component and copy the HLS IP-core (where /path/to/hls_function/ corresponds to where you compiled the hls core):

mkdir src/my-algo-repo/an-algo/firmware/cgn
cp -rp /path/to/hls_function/myfunc_0 src/my-algo-sim-so1/an-algo/firmware/cgn/.

If you are using a library IP-core and not your custom HLS one, then the last line can be only the .xci file, i.e.:

mkdir -p src/my-algo-repo/an-algo/firmware/cgn/myfunc_0
cp -rp /path/to/hls_function/myfunc_0/myfunc_0.xci src/my-algo-sim-so1/an-algo/firmware/cgn/.

Create dependency file:

The specific device to be simulated needs to be explicitly stated in order for ModelSim to instantiate the correct library:

cd src/my-algo-repo/an-algo/firmware/cfg
echo include -c emp-fwk:boards/serenity/dc_ku15p device.dep >> top_sim.dep

The dc_ku15p should be changed to the appropriate FPGA for which you are simulating the firmware for.

Now add the simulation testbench to the dependency:

echo include -c emp-fwk:boards/testbench >> top_sim.dep
echo src emp_payload.vhd >> top_sim.dep

Next the IP-core “xci” file needs to be added:

echo src --cd ../cgn/myfunc_0 myfunc_0.xci >> top_sim.dep

If you have a self-contained algorithm within emp_payload.vhd then the last step is obviously unnecessary.

Lastly add the testbench example project and constants to the dependency file:

echo include -c emp-fwk:projects/examples/testbench tb_top.dep >> top_sim.dep
echo include -c emp-fwk:boards/testbench packages.dep >> top_sim.dep

Create and run the simulation project

Go back to the top IPPB directory (the one with src and proj) and create a new simulation project:

ipbb proj create sim my_sim_algo my-algo-repo:an-algo -t top_sim.dep
cd proj/my_sim_algo/
ipbb sim setup-simlib

If it is the first time you’ve run ModelSim in your vivado environment then it will begin by creating a library of all the Xilinx devices that you have installed for the specific version. This may take a while (about 30 minutes). Errors can occur at this step for the compilation of some devices. If this occurs check that LD_PRELOAD has not been set for your environment (and unset it if it has) and also verify that you have a valid licence for ModelSim (separate from vivado). Lastly check that you have the compatible version of ModelSim for your version of vivado (the warning is outputed to the screen). Then repeat the last command.

Simulate the IP-cores and make the simulation (vsim) project:

ipbb sim ipcores
ipbb sim generate-project

Lastly you can run the simulated FPGA with your algorithm. First you need an injection file for the buffers, e.g. inject_null.txt (right click and save-as). Now run the vsim tool:

./run_sim -c work.top -Gsourcefile=inject_null.txt -Gsinkfile=output.txt -do 'run 5us' -do 'quit'

Note the ./ is required since this runs a wrapper with the correct environment to the native vsim.

Finally the output.txt should contain the equivalent output of the buffers as you would find if you ran on real hardware.

vsim can also be run within vivado or within the ModelSim GUI for more diagnostics and investigation of the simulation.